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description the CXD2411AR is a timing signal generator for color lcd panel drivers. features generates the lcx005bk/bkb and lcx009ak/akb drive pulse. supports right/left inverse display. supports 16:9 wide display. supports csync and separate sync (xhd, xvd) input. supports line inversion and field inversion. ac drive for lcd panel during no signal (ntsc/pal). generates timing signal of external sample-and- hold circuit. afc circuit supporting static and dynamic fluctuations. applications color lcd viewfinder single-panel and three-panel projectors structure silicon gate cmos ic absolute maximum ratings (ta = 25?) supply voltage v dd v ss ?0.5 to +7.0 v input voltage v i v ss ?0.5 to v dd + 0.5 v output voltage v o v ss ?0.5 to v dd + 0.5 v operating temperature topr ?0 to +85 ? storage temperature tstg ?5 to +150 ? recommended operating conditions supply voltage v dd 2.7 to 5.5 v operating temperature topr ?0 to +85 ? ?1 CXD2411AR e95z14-st timing generator for color lcd panels sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 48 pin lqfp (plastic)
? 2 CXD2411AR block diagram and pin configuration p l l p h a s e c o m p a r a t o r h - s y n c d e t e c t o r h - s k e w d e t e c t o r v - s y n c s e p e r a t o r ( n o i s e s h a p e ) v - t i m i n g p u l s e g e n e r a t o r p l l - c o u n t e r h a l f - h k i l l e r h - t i m i n g p u l s e g e n e r a t o r 2 6 c k o x c l r t s t 3 s l c k x h d c k i p l n t t s t 4 t s t 5 t s t 6 t s t 7 t s t 8 e n v d v s t v c k 1 v c k 2 f l d o s b l k w i d e r p d v s s h d x c l p v d d v s s v d d v s s h p 1 h s t 1 h p 2 h p 3 h p 4 r g t h s t 2 h c k 1 h c k 2 s h 1 s h 2 s h 3 s h 4 c l r s l f r f r p m a s t e r c k f i e l d & l i n e c o n t r o l l e r 2 3 4 5 1 1 1 2 1 5 1 7 1 8 2 0 2 1 2 5 2 7 2 9 3 7 4 1 4 2 4 4 1 p a l p u l s e e l i m i n a t o r 6 1 0 1 3 1 4 1 6 1 9 2 2 2 3 2 4 2 8 3 0 4 0 3 9 3 8 3 6 3 5 3 4 3 1 3 2 3 3 4 3 4 6 4 7 4 8 t s t 0 t s t 1 t s t 2 7 8 9 4 5 x v d
? 3 CXD2411AR pin description pin no. symbol i/o description input pin for open status 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 slck plnt xclr wide sblk v ss tst0 tst1 tst2 rgt tst3 tst4 slfr hst2 tst5 clr en vst v dd vck2 vck1 hst1 hck2 hck1 vd tst6 xhd frp fldo sh4 v ss sh1 sh2 sh3 xclp hd tst7 i i i i o i i o o o o o o o o o o i o o o o o o o o switches between lcx005bk (h) and lcx009 (l) switches between pal (h) and ntsc (l) cleared at 0v switches between 16:9 display (h) and 4:3 display (l) black signal pulse output (during wide mode) (positive polarity) gnd leave this open. leave this open. leave this open. switches between normal scan (h) and reverse scan (l) leave this open. leave this open. switches between field inversion (h) and line inversion (l) h start pulse 2 (positive polarity) leave this open. clr pulse output (positive polarity) en pulse output (negative polarity) v start pulse (positive polarity) power supply v clock pulse 2 v clock pulse 1 h start pulse 1 (positive polarity) h clock pulse 2 h clock pulse 1 vd pulse output (positive polarity) leave this open. xhd (negative polarity)/composite sync (positive polarity) input ac drive timing pulse output field identification signal output sample-and-hold pulse (positive polarity) gnd sample-and-hold pulse (positive polarity) sample-and-hold pulse (positive polarity) sample-and-hold pulse (positive polarity) burst position clamp pulse output (negative polarity) hd pulse output (positive polarity) leave this open. l l h l h l
? 4 CXD2411AR 38 39 40 41 42 43 44 45 46 47 48 hp4 rpd v ss cko cki v dd tst8 xvd hp1 hp2 hp3 i o o i i i i i switches for the horizontal display position phase comparator output gnd oscillation cell (output) oscillation cell (input) power supply leave this open. xvd (negative polarity) input switches for the horizontal display position switches for the horizontal display position switches for the horizontal display position h l l l l (h: pull up, l: pull down) note) the CXD2411AR processes csync and separate sync inputs with the same pins. therefore, care should be given to the following points when using the CXD2411AR. 1) during csync input, the xvd input pin should be set to l or left open. 2) during separate sync input (xhd, xvd), the xvd width specification is from 2h to 10h. pin no. symbol i/o description input pin for open status
? 5 CXD2411AR electrical characteristics 1. dc characteristics (temperature = 25 c, v ss = 0v) item symbol min. typ. max. unit conditions supply voltage input voltage input voltage input voltage input voltage input voltage output voltage output voltage output voltage output voltage output voltage output voltage input leak current input leak current input leak current output leak current current consumption v dd v ih v ih v il v ih v il v oh v ol v oh v ol v oh v ol i l i il i ih i lz i dd ttl input cell (5v 10%) ttl input cell (3.0v 10%) ttl input cell cmos input cell cmos input cell i oh = ?ma (hckn, vckn) i ol = 8ma (hckn, vckn) i oh = ?ma (cko, cki) i ol = 3ma (cko, cki) i oh = ?ma (other than the above) i ol = 4ma (other than the above) normal input pin with pull-up resistor with pull-down resistor rpdn, fpdn (at high impedance state) v dd = 5.0v 2.7 2.2 1.8 0.7v dd v dd ?0.8 v dd /2 v dd ?0.8 ?0 ?2 12 ?0 ?00 100 25 5.5 0.8 0.3v dd 0.4 v dd /2 0.4 10 ?40 240 40 v v v v v v v v v v v v a a a a ma 2. ac characteristics (v dd = 2.7 to 5.5v) item applicable pins min. typ. max. unit conditions clock input cycle cross-point time difference cross-point time difference output rise delay output fall delay output rise delay output fall delay hck1, sh1 delay time difference hck1, sh1 delay time difference hck2, sh1 delay time difference hck2, sh1 delay time difference hck1 duty hck2 duty cki hck1, hck2 vck1, vck2 hckn, vckn hckn, vckn other than hckn and vckn other than hckn and vckn hck1, sh1 hck1, sh1 hck2, sh1 hck2, sh1 hck1 hck2 cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf cl = 30pf 60 60 60 60 60 46 46 10 10 30 25 40 22 85 95 85 95 52 52 ns ns ns ns ns ns ns ns ns ns ns % % symbol ? t ? t tpr tpf tpr tpf dt1 dt2 dt1 dt2 th/th + tl th/th + tl note) n = 1, 2
? 6 CXD2411AR t p r t p f o u t p u t o u t p u t c k i v d d 0 v v d d 0 v v d d 0 v t t 5 0 % 5 0 % 5 0 % t h t l t 2 t 1 5 0 % 5 0 % d t 1 d t 2 c k i s h 1 t h t l = 2 ( t t 1 ) t h = t t 1 + t 2 t l = t t 2 + t 1 t h t l = 2 ( t 2 t 1 ) 5 0 % 5 0 % 5 0 % 5 0 % d t d t v d d 0 v v d d 0 v v c k 1 ( h c k 1 ) v c k 2 ( h c k 2 ) h c k 1 ( h c k 2 ) timing definition
? 7 CXD2411AR lcx005bk/bkb and lcx009ak/akb color coding diagram the delta arrangement is used for the color coding in the lcd panels with which this ic is compatible. note that the shaded region within the diagram is not displayed. lcx005bk/bkb pixel arrangement r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r r b g r b g r b g r b g r b g b r b r b r b r b r g h s w 1 d u m m y 2 t o 5 h s w 2 h s w 3 h s w 1 7 4 h s w 1 7 5 d i s p l a y a r e a p h o t o - s h i e l d i n g a r e a 5 3 7 3 5 2 1 1 3 2 2 2 1 8 2 2 2 g b g b g b g b g b r g b r g b r g b r g b r g b r r b g r b g r b g r b g r b g b r g g b d u m m y 1 d u m m y 2 v l i n e 1 v l i n e 2 v l i n e 3 v l i n e 2 1 7 v l i n e 2 1 8 d u m m y 3 d u m m y 4 basic specifications total horizontal dots : 537h horizontal display dots : 521h total vertical dots : 222h vertical display dots : 218h total dots : 119,214h display dots : 113,578h
? 8 CXD2411AR lcx009ak/akb pixel arrangement r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r g b r g b r g b r g b r g b r r b g r b g r b g r b g r b g b r b r b r b r b r g d u m m y 1 t o 4 d u m m y 5 t o 8 h s w 1 h s w 2 h s w 2 6 7 h s w 2 6 8 d i s p l a y a r e a p h o t o - s h i e l d i n g a r e a 8 2 7 1 4 8 0 0 1 3 2 1 2 2 5 2 2 8 r g b r g b r g b r g b r g b r r b g r b g r b g r b g r b g b r g d u m m y 1 d u m m y 2 v l i n e 1 v l i n e 2 v l i n e 3 v l i n e 2 2 4 v l i n e 2 2 5 d u m m y 3 basic specifications total horizontal dots : 827h horizontal display dots : 800h total vertical dots : 228h vertical display dots : 225h total dots : 188,556h display dots : 180,000h
? 9 CXD2411AR description of mode selection switch (slck, plnt, wide) slck plnt mode h h h h l l l l l l h h l l h h wide l h l h l h l h lcx005bk/bkb, ntsc, normal lcx005bk/bkb, ntsc, wide lcx005bk/bkb, pal, normal lcx005bk/bkb, pal, wide lcx009ak/akb, ntsc, normal lcx009ak/akb, ntsc, wide lcx009ak/akb, pal, normal lcx009ak/akb, pal, wide * normal (4:3 display), wide (16:9 display) slfr slfr is the selector switch for the ac drive timing pulse (frp). this switch selects field inversion when h and line inversion when l. normally, line inversion (l) is used. the transition point is one clock cycle after the transition point of the vck1 and vck2 pulses. 1 h 1 f i e l d 1 f i e l d 1 h 1 h i n v e r s i o n ( 2 h c y c l e ) 1 f i n v e r s i o n ( 2 f c y c l e ) * f r p p o l a r i t y i s n o t s p e c i f i e d . f r p 1 h 1 h
? 10 CXD2411AR hp1, 2, 3, 4 these are selector switches for the horizontal display position. the hst timing can be set at 2fh intervals in 16 different ways by using the four hst position bits. the picture center is set at internal preset value: hp1/2/3/4: lllh. however, actually, because there is a difference between the rgb signal and the drive pulse delays, the picture center may not match the design center. in this case, adjust with these switches. the hst timing (from sync termination to the rising edge of hst) for even lines is shown below. lcx005bk/bkb (ntsc, pal) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 72fh (6.51/6.56 s) 70fh 68fh 66fh 64fh 62fh 60fh 58fh 56fh (5.06/5.11 s) 54fh 52fh 50fh 48fh 46fh 44fh 42fh (3.80/3.83 s) 74.5fh (6.74/6.79 s) 72.5fh 70.5fh 68.5fh 66.5fh 64.5fh 62.5fh 60.5fh 58.5fh (5.29/5.33 s) 56.5fh 54.5fh 52.5fh 50.5fh 48.5fh 46.5fh 44.5fh (4.02/4.06 s) hp4 hp3 hp2 hp1 hst1 (ntsc/pal) hst2 (ntsc/pal) * the hst1 and 2 timing for odd lines is 1.5fh delayed and 1.5fh advanced respectively from the above timings. (refer to the timing charts for details.)
? 11 CXD2411AR lcx009ak/akb (ntsc, pal) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 91fh (5.51/5.55 s) 89fh 87fh 85fh 83fh 81fh 79fh 77fh 75fh (4.54/4.57 s) 73fh 71fh 69fh 67fh 65fh 63fh 61fh (3.69/3.72 s) 93.5fh (5.66/5.70 s) 91.5fh 89.5fh 87.5fh 85.5fh 83.5fh 81.5fh 79.5fh 77.5fh (4.69/4.72 s) 75.5fh 73.5fh 71.5fh 69.5fh 67.5fh 65.5fh 63.5fh (3.84/3.87 s) hp4 hp3 hp2 hp1 hst1 (ntsc/pal) hst2 (ntsc/pal) * the hst1 and 2 timing for odd lines is 1.5fh delayed and 1.5fh advanced respectively from the above timings. (refer to the timing charts for details.)
? 12 CXD2411AR right/left inversion the lcd panel is arranged in a delta pattern, where identical signal line has 1.5-dot offset at adjoining vertical lines. for this reason, a 1.5-bit offset is attached to the horizontal start pulse (hst) between odd lines and even lines. hck and sh are also 1.5-bit offset in a similar manner. when the panel is driven with left scan (reverse scan), this offset relationship becomes inverted for even and odd lines. moreover, since the dot arrangement is asymmetrical, the hst position is also changed. the CXD2411AR deals with this inversion as follows. when using single-panel (1) when the right/left inversed-identification pin (rgt) goes l, the relationship concerning hck output switches between odd and even lines. in this case, use hst1 for the horizontal direction start pulse. when rgt is h: right scan mode is on. the right scan drive pulse is output by the timing generator and is supplied to the panel. when rgt is l: left scan mode is on. the left scan drive pulse is output by the timing generator and is supplied to the panel. when using three-panels (1) in order to be able to simultaneously drive three panels, with a mixture of right/left inversion on and off, output two pulses regarding hst pulse: hst1 for right scan (normal scan) and hst2 for left scan (reverse scan). in addition, left and right scan outputs are necessary for the rgt signal as well. however, since this timing generator does not have an rgt (right/left inversed-identification) output pin for left scan, external measures must be taken. similarly, external measures are also taken for hck1 and 2. regarding sh, the wiring of sh1 and sh4 to the driver ic. (2) when the right/left inversed-identification pin (rgt) goes l, the relationship concerning hck output switches between odd and even lines for each output switches. when rgt is h: right scan mode is on. the right scan (a) and left scan (b) drive pulses are output by the timing generator and are supplied to panels 1 and 2 and panel 3, respectively. when rgt is l: left scan mode is on and (a) and (b) outputs are switched. accordingly, panels 1 and 2 are used for left scan and panel 3 changes to right scan. a a a a a a v s c a n n e r a a a d i s p l a y a r e a r i g h t s c a n ( n o r m a l s c a n ) l e f t s c a n ( r e v e r s e s c a n ) a a a a a a a a h s c a n n e r
? 13 CXD2411AR application circuit (three-panel lcd drive) s h 1 s h 2 s h 3 s h 4 t g s h 1 s h 2 s h 3 s h 4 s h 1 s h 2 s h 3 s h 4 r i g h t s c a n d r i v e r 3 0 3 4 3 3 3 2 l e f t s c a n d r i v e r s i g n a l d r i v e r r i g h t s c a n o u t p u t ( a ) p a n e l 2 ( r i g h t s c a n ) s i g n a l d r i v e r p a n e l 1 ( r i g h t s c a n ) ( t o a l l p a n e l s ) t g s h 1 s h 2 s h 3 s h 4 h s t 1 v s t v c k 1 v c k 2 e n c l r l e f t s c a n o u t p u t ( b ) s i g n a l d r i v e r p a n e l 3 ( l e f t s c a n ) r g t i n s h 1 s h 2 s h 3 s h 4 h s t 2 h c k 1 h c k 2 r g t ( c o m m o n ) 3 2 3 3 3 4 3 0 2 2 3 2 3 3 3 4 3 0 1 4 2 4 2 3 1 0 1 8 2 1 2 0 1 7 1 6 * t h e f a c i n g o f t h e t h r e e p a n e l s i s t h e s a m e .
? 14 CXD2411AR sh pulse and hck phase relationship the phase relationship between the sh pulse and hck changes according to switching between right scan (normal scan) and left scan (reverse scan). in the present timing, sh3 is the re-sampling pulse. h c k 1 s h 1 s h 2 s h 3 s h 4 r g t = h ( n o r m a l s c a n ) r g t = l ( r e v e r s e s c a n )
? 15 CXD2411AR wide mode setting the wide pin (pin 4) to h, shifts the unit to wide mode. in this mode, the aspect ratio is converted through pulse eliminator processing, allowing 16:9 quasi-wide display. during wide mode, vertical pulse eliminator scanning of 1/4 for ntsc and 1/2 and 1/4 for pal, are performed, and the video signal is compressed to achieve a 16:9 aspect ratio. in addition, in areas outside the display area, black is displayed by performing high-speed scanning. the timing during high-speed scanning is a 2h cycle pulse consisting of normal drive (1h) and quadruple-speed drive (1h) and black signals are written in 28 and 27 lines, respectively of the upper and lower side of this display area. during this time, frp is changed to a 4h cycle, hst to a 2h cycle, and en and clr are not output. in addition, the sblk output, which is the black signal generation timing pulse, becomes h. (for example, black display in the panel is permitted by connecting the black signal output sblk to the external rgb input pin of the cxa1785r/ar.) refer to the attached sheets for detailed timing. 4 : 3 d i s p l a y 2 8 l i n e s ( 2 8 l i n e s ) 2 1 8 l i n e s ( 2 2 5 l i n e s ) v e r t i c a l p u l s e e l i m i n a t o r s c a n n i n g ( a t n o r m a l - s p e e d s c a n n i n g ) v e r t i c a l h i g h - s p e e d s c a n n i n g 1 6 : 9 d i s p l a y a a a d i s p l a y a r e a 1 6 3 l i n e s ( 1 6 9 l i n e s ) 2 7 l i n e s ( 2 8 l i n e s ) a a a d i s p l a y a r e a a a a a b l a c k d i s p l a y a r e a v c k 1 n o r m a l - s p e e d s c a n n i n g 2 h c y c l e h s t f r p s b l k 4 h c y c l e a t h i g h - s p e e d s c a n n i n g a a a a b l a c k d i s p l a y a r e a * n u m b e r s i n p a r e n t h e s e s a r e f o r t h e l c x 0 0 9 a k / a k b . a l l o t h e r n u m b e r s a r e f o r t h e l c x 0 0 5 b k / b k b . a t n o r m a l - s p e e d s c a n n i n g q u a d r u p l e - s p e e d s c a n n i n g
? 16 CXD2411AR o d d l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k x h d h c k 1 v c k 2 e n h p 1 / 2 / 3 / 4 : l l l h r g t : h ( n o r m a l s c a n ) 4 . 7 s ( 5 2 f h ) 4 . 7 s ( 5 2 f h ) o d d f i e l d e v e n f i e l d 2 . 1 s ( 2 3 f h ) 4 . 4 s ( 4 9 f h ) 1 . 3 s ( 1 4 f h ) 2 . 0 s ( 2 2 f h ) 4 . 5 f h 0 . 5 f h 1 3 f h 1 3 f h 1 8 . 5 f h 3 . 0 s ( 3 3 f h ) 0 . 5 s ( 6 f h ) lcx005bk/bkb horizontal direction timing chart ntsc/pal
? 17 CXD2411AR e v e n l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k h c k 1 v c k 2 e n 4 . 7 s ( 5 2 f h ) 4 . 7 s ( 5 2 f h ) o d d f i e l d e v e n f i e l d 2 . 1 s ( 2 3 f h ) 4 . 4 s ( 4 9 f h ) 1 . 3 s ( 1 4 f h ) 2 . 0 s ( 2 2 f h ) 3 . 0 f h 2 . 5 f h 1 3 f h 1 3 f h 1 8 . 0 f h 0 . 5 s ( 6 f h ) 3 . 0 s ( 3 3 f h ) x h d h p 1 / 2 / 3 / 4 : l l l h r g t : h ( n o r m a l s c a n ) lcx005bk/bkb horizontal direction timing chart ntsc/pal
? 18 CXD2411AR o d d l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k h c k 1 v c k 2 e n h p 1 / 2 / 3 / 4 : l l l h r g t : l ( r e v e r s e s c a n ) 4 . 7 s ( 5 2 f h ) 4 . 7 s ( 5 2 f h ) o d d f i e l d e v e n f i e l d 2 . 1 s ( 2 3 f h ) 4 . 4 s ( 4 9 f h ) 1 . 3 s ( 1 4 f h ) 2 . 0 s ( 2 2 f h ) 2 . 5 f h 4 . 0 f h 1 3 f h 1 3 f h 1 8 . 0 f h 0 . 5 s ( 5 f h ) 3 . 0 s ( 3 4 f h ) x h d lcx005bk/bkb horizontal direction timing chart ntsc/pal
? 19 CXD2411AR e v e n l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k h c k 1 v c k 2 e n 4 . 7 s ( 5 2 f h ) 4 . 7 s ( 5 2 f h ) o d d f i e l d e v e n f i e l d 2 . 0 s ( 2 2 f h ) 4 . 5 s ( 5 0 f h ) 1 . 4 s ( 1 5 f h ) 2 . 0 s ( 2 2 f h ) 1 3 f h 1 3 f h 5 . 5 f h 0 . 5 f h 1 8 . 5 f h 0 . 5 s ( 5 f h ) 3 . 0 s ( 3 4 f h ) x h d h p 1 / 2 / 3 / 4 : l l l h r g t : l ( r e v e r s e s c a n ) lcx005bk/bkb horizontal direction timing chart ntsc/pal
? 20 CXD2411AR o d d l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k x h d h c k 1 v c k 2 e n 4 . 7 s ( 7 8 f h ) 4 . 7 s ( 7 8 f h ) o d d f i e l d e v e n f i e l d 0 . 5 s ( 8 f h ) 3 . 0 s ( 5 0 f h ) 1 2 f h 1 2 f h 2 . 5 f h 0 . 5 f h 2 . 0 s ( 3 3 f h ) 1 . 3 s ( 2 2 f h ) 4 . 4 s ( 7 2 f h ) 2 . 1 s ( 3 4 f h ) 4 3 . 5 f h h p 1 / 2 / 3 / 4 : l l l h r g t : h ( n o r m a l s c a n ) lcx009ak/akb horizontal direction timing chart ntsc/pal
? 21 CXD2411AR e v e n l i n e n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k x h d h c k 1 v c k 2 e n 4 . 7 s ( 7 8 f h ) 4 . 7 s ( 7 8 f h ) o d d f i e l d e v e n f i e l d 2 . 1 s ( 3 4 f h ) 4 . 4 s ( 7 2 f h ) 1 . 3 s ( 2 2 f h ) 2 . 0 s ( 3 3 f h ) 2 . 5 f h 4 . 0 f h 1 2 f h 1 2 f h 4 3 . 0 f h 3 . 0 s ( 5 0 f h ) 0 . 5 s ( 8 f h ) h p 1 / 2 / 3 / 4 : l l l h r g t : h ( n o r m a l s c a n ) ( b l k ) lcx009ak/akb horizontal direction timing chart ntsc/pal
? 22 CXD2411AR n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( b l k ) h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k x h d h c k 1 v c k 2 e n 4 . 7 s ( 7 8 f h ) 4 . 7 s ( 7 8 f h ) o d d f i e l d e v e n f i e l d 2 . 1 s ( 3 4 f h ) 4 . 4 s ( 7 2 f h ) 1 . 3 s ( 2 2 f h ) 2 . 0 s ( 3 3 f h ) 2 . 5 f h 3 . 0 f h 1 2 f h 1 2 f h 4 3 . 0 f h 3 . 0 s ( 5 1 f h ) 0 . 5 s ( 7 f h ) o d d l i n e h p 1 / 2 / 3 / 4 : l l l h r g t : l ( r e v e r s e s c a n ) lcx009ak/akb horizontal direction timing chart ntsc/pal
? 23 CXD2411AR n o t e ) t h e t h i r d r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . h d x c l p h s t 1 h c k 2 s h 1 s h 3 s h 2 s h 4 f r p v c k 1 h s t 2 c l r m c k x h d h c k 1 v c k 2 e n 4 . 7 s ( 7 8 f h ) 4 . 7 s ( 7 8 f h ) e v e n l i n e 1 . 5 f h 0 . 5 f h 2 . 0 s ( 3 3 f h ) 1 . 3 s ( 2 2 f h ) 4 . 4 s ( 7 2 f h ) 2 . 1 s ( 3 4 f h ) o d d f i e l d e v e n f i e l d 0 . 5 s ( 7 f h ) 3 . 0 s ( 5 1 f h ) 1 2 f h 1 2 f h 4 3 . 5 f h h p 1 / 2 / 3 / 4 : l l l h r g t : l ( r e v e r s e s c a n ) ( b l k ) lcx009ak/akb horizontal direction timing chart ntsc/pal
? 24 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f r p f l d v d v c k 2 s b l k o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb vertical direction timing chart ntsc
? 25 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb vertical direction timing chart ntsc
? 26 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb vertical direction timing chart pal
? 27 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb vertical direction timing chart pal
? 28 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f r p f l d v d v c k 2 s b l k o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb vertical direction timing chart ntsc
? 29 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb vertical direction timing chart ntsc
? 30 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb vertical direction timing chart pal
? 31 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb vertical direction timing chart pal
? 32 CXD2411AR o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f r p f l d v d v c k 2 s b l k ( 1 f i n v e r s i o n ) ( 1 h i n v e r s i o n ) lcx005bk/bkb wide vertical direction timing chart ntsc
? 33 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb wide vertical direction timing chart ntsc
? 34 CXD2411AR o d d f i e l d x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb wide vertical direction timing chart pal
? 35 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx005bk/bkb wide vertical direction timing chart pal
? 36 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f r p f l d v d v c k 2 s b l k o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb wide vertical direction timing chart ntsc
? 37 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb wide vertical direction timing chart ntsc
? 38 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p o d d f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb wide vertical direction timing chart pal
? 39 CXD2411AR x h d x v d c s y n c ( b l k ) v s t v c k 1 f r p h s t c l r e n f l d v d v c k 2 s b l k f r p e v e n f i e l d n o t e ) t h e f o u r t h r o w o f t h e t i m i n g c h a r t " b l k " i s a p u l s e i n d i c a t e d a s a r e f e r e n c e a n d i s n o t a p u l s e o u t p u t f r o m p i n s . f r p p o l a r i t y i s n o t s p e c i f i e d f o r e a c h l i n e a n d f i e l d . ( 1 h i n v e r s i o n ) ( 1 f i n v e r s i o n ) lcx009ak/akb wide vertical direction timing chart pal
? 40 CXD2411AR ac driving for no signal hst1, hst2, hck1, hck2, frp, vck1, vck2, xclp, hd, vd, and vst are made to run free so that the lcd panel is ac driven even when there are no horizontal and vertical sync signals from the xhd and xvd pins. during this time, the pll counter is made to run free because the horizontal sync separation circuit stops. in addition, the auxiliary v counter is used to create the reference pulse for generating vd and vst because the vertical sync separation circuit is also stopped. the cycle of this v counter is designed to be 269h for ntsc and 321h for pal. however, when there is no vertical sync signal for 301h (ntsc) or 360h (pal), the no signal state is assumed and the free running vd and vst pulses are generated from the next field. the rpd is kept at high impedance when there is no signal in order to prevent the afc circuit from causing phase errors due to phase comparison. afc circuit (702/1050fh generation) t h e c e n t e r o f s y n c 4 . 7 s 5 v 0 v r p d 2 . 5 v x h d a fully synchronized afc circuit is built in. pll error detection signal is generated at the following timing. the phase comparison output of the entire bottom of xhd and the internal h counter becomes rpd. rpd output is converted to dc error with the lag-lead filter, and then it changes the varicap capacitance and the oscillating frequency is stabilized at 702, 1050fh in the lcx005bk/bkb, lcx009ak/akb.
? 41 CXD2411AR application circuit 1 k + 5 v 1 0 k 3 3 0 0 p 3 3 k 0 . 0 1 1 0 k 1 0 0 k 2 0 p 1 0 0 0 p + 1 2 v + 5 v p a l n t 1 6 : 9 4 : 3 n r r g b e x t e r n a l i n p u t ( r g b d r i v e r ) + 5 v l c d p a n e l l c d p a n e l 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 1 r g b d e c o d e r b a c k l i g h t d r i v e r c i r c u i t r g b d r i v e r s a m p l e - a n d - h o l d c i r c u i t ( r g b d r i v e r ) s a m p l e - a n d - h o l d c i r c u i t ( r g b d r i v e r ) a c c o n v e r s i o n c i r c u i t ( r g b d r i v e r ) h c k 1 3 . 3 l c x 0 0 5 b k / b k b l c x 0 0 9 a k / a k b l r g b d e c o d e r h d x h d n . c . v d x c l p s h 3 s h 2 s h 1 v s s s h 4 f l d o f r p h c k 2 h s t 1 v c k 1 v c k 2 v d d v s t e n c l r n . c . h s t 2 s l f r s l c k r g t n . c . n . c . p l n t x c l r w i d e s b l k v s s t s t 0 t s t 1 t s t 2 n . c . h p 4 r p d v s s c k o c k i v d d n . c . x v d f p 1 f p 2 f p 3 reference examples of l value: when using lcx009ak/akb 4.7 h recommended varicap: 1t369 (sony) when using lcx005bk/bkb 10 h application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 42 CXD2411AR package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n p l a t i n g 4 2 / c o p p e r a l l o y p a c k a g e s t r u c t u r e 4 8 p i n l q f p ( p l a s t i c ) 9 . 0 0 . 2 * 7 . 0 0 . 1 1 1 2 1 3 2 4 2 5 3 6 3 7 4 8 ( 0 . 2 2 ) 0 . 1 8 0 . 0 3 + 0 . 0 8 0 . 2 g l q f p - 4 8 p - l 0 1 l q f p 0 4 8 - p - 0 7 0 7 ( 8 . 0 ) 0 . 5 0 . 2 0 . 1 2 7 0 . 0 2 + 0 . 0 5 a 1 . 5 0 . 1 + 0 . 2 0 . 1 s o l d e r / p a l l a d i u m n o t e : d i m e n s i o n * d o e s n o t i n c l u d e m o l d p r o t r u s i o n . 0 . 1 0 . 1 0 . 5 0 . 2 0 t o 1 0 d e t a i l a 0 . 1 3 m 0 . 5 s s b d e t a i l b : s o l d e r ( 0 . 1 8 ) ( 0 . 1 2 7 ) d e t a i l b : p a l l a d i u m 0 . 1 2 7 0 . 0 4 0 . 1 8 0 . 0 3 + 0 . 0 8 0 . 1 2 7 0 . 0 2 + 0 . 0 5 0 . 1 8 0 . 0 3

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